Pipelined VLSI Architecture for RSA Based on Montgomery Modular Multiplication

Modular multiplication forms a key operation in many public key cryptosystems. Montgomery Multiplication is one of the well-known algorithms to carry out the modular multiplication more quickly. Carry Save Adders are employed to avoid carry propagation at each addition operation. To reduce the extra clock cycles, Configurable carry save adder either with one full-adder or two half-adders can be employed. In addition to that, a mechanism used to skip the unnecessary carry-save addition operations in the one-level CCSA while maintaining the short critical path delay had been developed. In the proposed architecture, maximum worst case delay is analyzed to enhance the throughput. In the path, additional buffers are introduced so that the clock is synchronized to reduce the worst case delay. As a result, pipelining concept is introduced which increases the speed and achieves a high throughput. The pipelined architecture is applied in RSA public key algorithm to increase the throughput of RSA cryptosystem. Citation: Vinodhini.N, Dr.Mahalingam College of Engineering and Technology; Suganya.C ,. "Pipelined VLSI Architecture for RSA Based on Montgomery Modular Multiplication." Global Research and Development Journal For Engineering : 463 - 469.