DESIGN OF A 4-BIT MAGNITUDE COMPARATOR USING SIMULINK

In this paper, the design of a 4-bit magnitude comparator using Simulink is presented. An overview of a magnitude comparator is carried out in the first section, in terms of its application in engineering. The second section presents the methodology of the design; thus, a closer look at the magnitude comparator is achieved by looking at its block diagram, its truth table, and the equations which characterize the truth table. The second section also presents the Simulink modelling environment, with a snapshot of its interface and functions. The implementation of the design, using Simulink, is also presented in the second section. The design was achieved by splitting the design of the circuit into three stages. The third section of the paper presents the results and discussion. The results were obtained by simulating the magnitude comparator circuit with three sets of data. In the first set of data, data A was equal to data B. In the second set of data, data A was greater than data B. In the third set of data, data A was less than data B. The simulation produced the expected results in the case of each data set, thus verifying the accuracy of the design. The final part of the paper presents the conclusion arrived at, at the end of the design.