A Hybrid Branch Predictor Tracking Register Dependency and Basic Block

ABSTRACT Modern microprocessors are forced to deliver high performance in spite of dramatic silicon process development. To meet such demands, modern microprocessors adopt the superscalar technique as well as speculative execution technique. However, these approaches are depends on accurate branch prediction. Thus, an accurate branch predictor is a precondition to achieve sufficient system performance. To achieve accurate branch predictor, we divide access pattern into the two cases; the global history affinity pattern and the local history affinity pattern by using a Basic Blocks (BBs) sequence tracer and a General-Purpose register (GPRs) tracer. Proposed branch predictor switches both of prediction algorithm and selectively adjust valid history among past access pattern by tracking register dependency. As a result, the proposed model achieves 94.61% in its branch prediction hit rate while History Artificially Selected (HAS) predictor achieves 92.56%. Therefore, the proposed model achieves high branch prediction hit rate by sorting and extracting valid access history.