Wi MAX Deinter leaver’s Address Generation Unit through FPGA Implementation

The IEEE 802.16 standard, commonly known as WiMAX has broadband wirelessaccess over long distance. WiMAX has evolved from 802.16 to 802.16d for fixedwireless access and IEEE 802.16e standard is for mobility support. WiMAX Forumcreated the name "WiMAX". The forum describes WiMAX as "a standards-based technology enabling the delivery of last mile wireless broadband access as an alternative to cable and DSL". WiMAX is similar to Wi-Fi, but it can enable usage at much larger scale and at faster speeds [1]. Inorder to minimize the effect of burst error, the channel interleaver/deinterleaver employed in the WiMAX transreceiver is used. The channel interleaver/deinterleaver consists of two memory blocks and an address generator. The objective of this project is to implement an area and delay efficient circuitry for address generator for WiMAX 2- D Deinterleaver using the Xilinx FPGA for all permissible code rates and modulation schemes. This project also build up a generalized circuit for all permissible Ncbps without manual computation of column number.