Power Factor Correction Using Bridgeless Boost Topology

Power quality is becoming a major concern for many electrical users. The high power non linear loads (such as adjustable speed drives, arc furnace, static power converter etc) and low power loads (such as computer, fax machine etc) produce voltage fluctuations, harmonic currents and an inequality in network system which results into low power factor operation of the power system. The devices commonly used in industrial, commercial and residential applications need to go through rectification for their proper functioning and operation. Due to the increasing demand of these devices, the line current harmonics create a major problem by degrading the power factor of the system thus affecting the performance of the devices. Hence there is a need to reduce the input line current harmonics so as to improve the power factor of the system. This has led to designing of Power Factor Correction circuits. Power Factor Correction (PFC) involves two techniques, Active PFC and Passive PFC. An active power factor circuit using Boost Converter is used for improving the power factor. This thesis work analyzes the procedural approach and benefits of applying Bridgeless Boost Topology for improving the power factor over Boost Converter Topology. A traditional design methodology Boost Converter Topology is initially analyzed and compared with the Bridgeless Boost topology and the overall Power Factor (PF) can be improved to the expectation. Method of re-shaping the input current waveform to be similar pattern as the sinusoidal input voltage is done by the Boost converter and the related controls that act as a Power Factor Correction (PFC) circuit. Higher efficiency can be achieved by using the Bridgeless Boost Topology. In this paper simulation of Boost Converter topology and Bridgeless PFC boost Converter is presented. Performance comparisons between the conventional PFC boost Converter and the Bridgeless PFC Boost Converter is done.