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Efficient Area and Speed Optimized Multiplication Technique Using Vedic and Tree Addition Structure
Journal: Advances in Computer Science : an International Journal(ACSIJ) (Vol.2, No. 3)Publication Date: 2013-07-31
Authors : Namrata Mishra; Utsav Malviya;
Page : 42-47
Keywords : Digital Signal Processor (DSP); Arithmetic and Logical Unit (ALU); Multiply and Accumulate (MAC);
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Abstract
Now days we are living in digital world, where all the operations get performed more reliably and with highest accuracy by digital signal processor. The multiplier is the key element of all these processor like Microprocessor, Microcontroller, DSP process ...
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Last modified: 2014-02-03 22:12:39