Establishing a Low Bandwidth and Low Latency Transceivers for Low Dense Applications

The main objective of this project is to design a low power and reusable FM0, Manchester encoder for DSRCS applications. Fully reused VLSI architecture using (similarity-oriented logic simplification) SOLS technique for both FM0 and Manchester encodings is proposed. Dedicated short-range communications are one-way or two-way short-range to medium-range wireless communication channels specifically designed for automotive use and a corresponding set of protocols and standards. The SOLS technique eliminates the limitation on hardware utilization by two core techniques: area compact retiming and balance logic-operation sharing. The balance logic-operation sharing efficiently combines FM0 and Manchester encodings with the identical logic components. Further, this project is enhanced by using clock gating technique; we are going to reduce the power in memory organization. Power supply will be provided to corresponding accessed rows only