8 BIT CUSTOM MIPS MICROPROCESSOR

MIPS is a RISC instruction set architecture which has gained popularity over many year and has found many uses in various embedded systems. This paper describes how to implement the instruction execution unit of a single cycle 8-bit RISC architecture having a custom instruction set which is based on 32 bit microMIPS architecture, a type of MIPS architecture and also explains the functioning and execution of each type of instruction supported. The paper also describes various functional units in the 8 bit custom architecture. The custom instruction set includes 9 instructions and implementation of the proposed architecture is done using Verilog on Field Programmable Gate Array (FPGA) Altera Cyclone II. A different approach for the implementation of these execution units for a subset of instructions is presented in detail.