High Speed FSM-based programmable Memory Built-In Self-Test (MBIST) Controller

This paper proposed a High speed FSM-based controller for programmable memory built-in self-test for testing memory devices. This technique is popular because of its flexibility of new test algorithms. The architecture of controller is designed to implement a new test algorithm has less number of operations and this algorithm emphasis testing of high density memory ICs either faulty or good.The components of controller is studied and designed using Verilog HDL. The analysis of the timing, logic area usage and speed are presented.