An Optimize Technique for Channel Security
Journal: International Journal of Electronics, Communication & Instrumentation Engineering Research and Development (IJECIERD) (Vol.4, No. 2)Publication Date: 2014-04-30
Authors : Eshant G. Rajgure; Ajay P. Thakare;
Page : 39-46
Keywords : UART; VHDL; VLSI; FPGA;
Abstract
UART (Universal Asynchronous Receiver Transmitter) is a serial communication protocol; mostly used for long-distance, high speed, low-cost data exchange between computer and peripherals. During the actual industrial production, sometimes we do not need the full functionality of UART, but simply integrate its core part. UART includes three basic modules which are the baud rate generator, receiver and transmitter. The UART implemented with VHDL language can be integrated into the FPGA (Field Programmable Gate Array) to achieve compact, stable and reliable data transmission. It is also significant for the design of SOC. In this project Paper we are concentrating on one of the most secured way of serial communication by automatic generation and detection of Baud Rate. To achieve auto bauding we adopt configuration of UART using FPGA. UART controller is designed based on FPGA that provide low cost, high performance logic solutions for applications having complex control systems and meet their secured communication demands quickly and efficiently. During Communication Unwanted Receiver gets try to intrude common data on channel, In that case it has raw data but they cannot identify the original form of data transmitted. It is because of continuous variation of baud rate by baud generator is detected by uart (receiver) but not by microcontroller (intruder). Original form of data is different than what it collects. This system is reconfigurable and scalable and it is used to reduce the synchronization error between the subsystems with in a system. After studying this project paper we definitely proved that this is “The Optimum Technique for Secured Communication”.
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Last modified: 2014-05-01 21:40:02