Sleepy Keeper Approach for Common Source CMOS Amplifier for Low-Leakage Power VLSI Design.

As the scaling goes deep into nano-meter range the leakage power dissipation has overtaken the dynamic power dissipation in VLSI circuits. The demand for low power consumer electronic gadgets which are portable reliable and with a long battery life has necessitated the circuits which have low power dissipation in their standby and active mode of operation. Sleepy keeper is one such technique which aims to reduce the leakage power. This paper attempts to implement the sleepy keeper (SK) approach for the common source (CS) amplifier since amplifiers are one of the important circuits in analogue and digital integrated circuit design. The leakage and dynamic power dissipation, Area and the logical states are analysed over different technologies. It is observers that there is reduction in leakage power dissipation of sleepy keeper common source amplifier (SKCSA) as compared to normal CS CMOS amplifier in different technology