A Real Time Implementation of an Image Scaling Processor Using VLSI Technique.

Image scaling is a very important technique and has been widely used in many image processing applications. In applications where the scaling process must be performed at the display rather than at the CPU OR GPU, dedicated hardware implementation is necessary.Low-complexity image processing algorithms are necessary for VLSI implementation of real time applications. The image scaling algorithm of the proposed system consists of a sharpening spatial filter, a clamp filter, and a bilinear interpolation. Images are captured in real time by an image sensor and send to the FPGA along with the scaling parameter. Serial connectivity is provided to the FPGA and the scaled images are displayed on the PC. The filter combining, hardware sharing techniques of the bilinear interpolator and reconfigurable techniques has been used to reduce hardware costs.