VLSI Design of Non-Redundant Radix-4 Signed-Digit Encoding for Pre-Encoded Multipliers
Journal: International Journal of Engineering and Techniques (Vol.3, No. 6)Publication Date: 2017-12-01
Authors : Kalpana Kparaboina Pabbaraju Padmaja N.Chandrashekhar;
Page : 445-449
Keywords : Modified booth Algorithm; Pre-Encoded Multiplier; Conventional MBMultiplier; Pre Encoded MB Multiplier; VLSI Design.;
Abstract
In this paper, we show an outline of pre-encoded multipliers for cutting edge hail dealing with applications in perspective of separated encoding of coefficients. To this extend, the Non-Redundant radix-4 Signed-Digit (NR4SD) encoding system, which uses the digit regards f1; 0; þ1; þ2g or f2; 1; 0; þ1g, is proposed provoking a multiplier plot with less personality boggling fragmentary things execution. Wide exploratory examination affirms that the proposed pre-encoded NR4SD multipliers, including the coefficients memory, are more zone and power profitable than the consistent Modified Booth plot
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