Design of Schmitt Trigger Circuits Using VTCMOS for Sub-Threshold Circuits
Journal: International Journal of Computer Science and Mobile Computing - IJCSMC (Vol.7, No. 6)Publication Date: 2018-06-30
Authors : Syed Ameer Hussain;
Page : 181-187
Keywords : CMOS; VTCMOS; DTMOS; MTMOS; hysteresis;
Abstract
In this paper, a low voltage Schmitt trigger has been designed using VTMOS technique and basic gates AND, OR using VTMOS technique. In Proposed design, positive and negative biasing voltages are given for the substrates of PMOS and NMOS devices for reducing the threshold voltages of devices and allowing the circuit operation in subthreshold region. The proposed design shows 0.21nW power dissipation in 90nm technology with optimum biasing voltage is 0.4V and it can be operated for supply voltage of 0.01V.The design is implemented by using Synopsys tool (version-L-2016.06-8) using custom compiler in 90nm technology.
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Last modified: 2018-07-01 15:55:19