An Inventive Design of Multiplier Using 8*8 Bit Reversible NS Gate
Journal: International Journal of Engineering and Techniques (Vol.4, No. 2)Publication Date: 2018-04-25
Authors : Penumallu Srinivasareddy Jaganmohan Panigrahi;
Page : 1024-1028
Keywords : Reversible Logic circuit; Reversible Logic Gate; Constant Input; Garbage Output; Low-Power VLSI etc.;
Abstract
Almost all digital system hardware, multiplier is one of the most important part. so a high speed, reduced area,reduced delay and low power consumption multiplier design will results in effective digital system design. The conventional gates AND,OR,EXOR are not reversible. Here the 8*8 reversible gate designs called NSG. The purpose of NS Gate is to implement in all logical Boolean operations.Reversible gates that carry out reversible logic synthesis are Feynman gate, Toffoli gate, fredkin gate, peres gate etc., and some other reversible gates. By using the reversible NS gate we make a multiplier that gives very efficient output.
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Last modified: 2018-07-06 21:38:45