AN ANALYSIS OF PARALLEL PROCESSING AT MICROLEVEL

To achieve performance processors rely on two forms of parallelism: instruction level parallelism (ILP) and thread level parallelism (TLP).ILP and TLP are fundamentally identical: they both identify independent instructions that can execute in parallel and therefore can utilize parallel hardware.ILP include, In this paper we begin by examining the issues (dependencies, branch prediction. window size, latency) on ILP from program structure. and give the use of thread-level parallelism as an alternative or addition to instruction-level parallelism. This paper explores parallel processing on an alternative architecture, simultaneous multithreading (SMT), which allows multiple threads to compete for and share all of the processor’s resources every cycle. The most compelling reason for running parallel applications on an SMT processor is its ability to use thread-level parallelism and instruction-level parallelism interchangeably. By permitting multiple threads to share the processor’s functional units simultaneously, the processor can use both ILP and TLP to accommodate variations in parallelism