A Survey on Low Power TSPC and E-TSPC CMOS 2/3 Prescaler

This survey paper describes dynamic circuit techniques, raising only a single-phase clock which is never inverted. The implementation of a dual-modulus prescaler using an extension of the true-single-phase-clock (TSPC) technique, the extended TSPC (E-TSPC), is discussed. The E-TSPC consists of a set of composition rules for single-phase-clock circuits employing static, dynamic, latch, data precharged, and NMOS-like CMOS blocks. The power consumption and operating frequency of the extended true single-phase clock (E-TSPC)-based frequency divider is also discussed. The short-circuit power and the switching power in the E-TSPC-based divider are discussed. A low-power divide-by-2/3 unit of a prescaler is proposed and implemented using a CMOS technology.