Optimization of DPC Process Applied by Electroless Copper Plating

With the continuous improvement of chip power, the area is shrinking and the integration is getting higher and higher. The LED package puts higher requirements on the heat dissipation substrate. Direct plated copper (DPC) is fabricated on a ceramic substrate by a thin film process. It has stable chemical properties, high thermal conductivity, fine wiring, and a coefficient of thermal expansion (CTE) matching the chip material. The important development direction of power LED package heat sink substrate. However, due to the high price of DPC substrates, there is no corresponding quality and testing standards, which limits its application in high-power LED packaging. In this thesis, electroless copper plating on ceramic surface is used as the seed layer of DPC substrate, which reduces the costly equipment and process such as magnetron sputtering, and reduces the manufacturing cost of DPC substrate. Pulse plating instead of DC plating thickens the copper layer line, which not only improves the efficiency. At the same time, the quality of the coating is optimized; the silver layer is replaced by the gold layer as the soldering layer and the protective layer to reduce the material cost; and compared with other types of ceramic substrates, some test methods for the performance of the DPC substrate are proposed to further standardize the DPC substrate quality standard. Explored. The relationship between the current density of pulse copper plating and the plating rate was analyzed. The results show that the two are proportional to each other within a certain range. At the same current density, pulse plating can significantly reduce the formation of the tumor-like structure and optimize the quality of the coating compared to DC plating. The current density of 3ASD not only improves the plating efficiency, but also obtains a well-formed circuit layer.