DESIGN OF A COMPACT NEGATIVE-EDGE TRIGGERED T FLIP-FLOP IN QCA TECHNOLOGY

Compatibility of a design is an archetype of three aspects, namely speed, power, and area. Achieving all three of them is exceptionally desirable. Quantum-dot Cellular Automata is one of the most surrogate nanotechnologies in the electronics industry. Being a low power utilizer, a high-speed operator, and Nano-size when it comes to the fabrication process, it has its own leverages. Quantum-dot Cellular Automata cells are assimilated in wires and logic gates as a fundamental building block of nanoscale digital circuits. Implementing QCA circuits with the help of the XOR gate, the circuit can be made simpler in delay and cell count. One of the sequential circuits, a flip-flop is a circuit which stores and controls data. This paper presents a compact negative-edge triggered T flip-flop structure in a superlative form. The T in T flip-flop is stands for “toggle” which is a circuit used for counter configuration. Depending on the clock signal, they are grouped into fallingedge triggered and rising-edge triggered flip-flops. When the clock rises or falls, the state of the output value changes. The T flip-flop design is focused to reduce cell count, area consumption and energy dissipation as compared to earlier and existing designs.