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A FPGA-Based Numerically Controlled Oscillator without Spurious Component

Journal: International Journal of Engineering Sciences & Research Technology (IJESRT) (Vol.3, No. 9)

Publication Date:

Authors : ;

Page : 358-367

Keywords : Direct Digital Synthesizer; SFDR; FPGA; Clock Management Module.;

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Direct digital synthesizers (DDS), or numerically controlled oscillators (NCO), are important components in many digital communication systems, such as digital radios and modems, software-defined radios, digital down/up converters for cellular and PCS base stations, etc. A common method for digitally generating a complex or real valued sinusoid employs a lookup table scheme. In this paper, a variable system clock technique and variable module counter based on current FPGA clock management technology is proposed for NCO implementation. The proposed design is implemented on Xilinx Virtex 5 FPGA and the simulation result demonstrates significant improvement in reducing the Spurious Free Dynamic Range (SFDR)

Last modified: 2014-10-16 21:21:28