An Efficient Hardware Implementation of Data Compression using Modified Golomb Rice Coding Architecture

Golomb coding is a loss-less data compression method using a family of data compression codes. Rice codes are a class of Golomb codes in which the divisor is valid only when it can be expressed as power of two. This work aims to increase compression by further encoding the unary part of the Golomb Rice (GR) code to decrease the numberof bits used. The algorithm was developed and coded in Verilog Hardware Description Language (VHDL)and simulated using Modelsim. The modifications carried out and reduction in bits used for a linearly distributed data set. Worst-case delays have been reduced acceptable level. Area reduction varies for different methods. An approximate 4% to 7% reduction in power consumption is observed. Modified Golomb Rice coding is used to compress multiple data types, which should ideally have a geometrical distribution.