A Verilog Design in FPGA Implementation Of Quadrature Phase Shift Keying (QPSK) Digital Modulator

The objective of this project deals with the design & implementation of a verilog design of QPSK Digital Modulator based on the FPGA Quartus-II simulator. Digital modulation is less complex, more secure and more efficient in long distance transmission. The noise detection and correction in digital is more efficient than analog counterpart. Digital modulation represents the transfer of the digital bit stream from the transmitter to the receiver via the analog channels. During the modulation process the information signal modifies one or more carrier parameters, leading to shift keying techniques. In past we are using analog modulation in which power, delay and area are important parameters to be considered. Hence in order to reduce power, delay and area we are using the digital modulation techniques such as BASK, BPSK and BFSK. In this paper minimum number of blocks are necessary for achieving QPSK modulation and for full integration with the other functional part of the Alter Development and Education FPGA board. The input carrier signal and the bit stream are user controllable. Hardware implemented in an FPGA can be reconfigured by programming the logic elements and interconnections for specific applications.