3D Tri-Gate Transistor Technology and Next Generation FPGAsJournal: International Journal of Engineering Sciences & Research Technology (IJESRT) (Vol.2, No. 10)
Publication Date: 2013-10-30
Authors : Mayur Bhole; Aditya Kurude;
Page : 2670-2675
Keywords : MOSFET; CMOS; FPGA; 3D tri-gate transistors; FinFET; DELTA.;
The 3D tri-gate transistors are a remarkable breakthrough in the realm of CMOS technology. These transistors can be considered as a reinvention of the transistor, in a way that they have supplanted the conventional "flat" 2D planar gate with an incredibly thin 3D silicon fin that rises up vertically from the silicon substrate. Such tri-gate transistors have shown significantly improved electrostatics in terms of sub-threshold slope and drain induced barrier lowering and hencebetter more scalability than planar transistors. This next-generation technology, which target ultra high-performance systems for military, wire line communications, cloud networking, and compute and storage applications, will enable breakthrough levels of performance and power efficiencies not otherwise possible. These tri-gate transistors in concert with other key semiconductor technologies will enable a new era of energy-efficient performance. This Paper discusses the 3-D Tri-Gate transistor technology, its developments and integration with other silicon processing technologies, and its impact on the next generation FPGAs based on it.
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