Easing Complication and Error Detection of RS Codes Using CA based CodesJournal: International Journal of Engineering Sciences & Research Technology (IJESRT) (Vol.2, No. 10)
Publication Date: 2013-10-30
Authors : N.Mageswari; Dr.K.Mahadevan;
Page : 3015-3020
Keywords : RS codes; Cellular?Automata (CA) code; error correction; VLSI implementation.;
This paper reports a novel approach for Cellular Automata (CA) based byte error correction codes to extend the integrated architecture of Reed-Solomon (RS) codes. In general, reed Solomon codes are widely used for forward error correction codes in communication system. Burst-error correction is a relatively complicated playing field because of the computational difficulty. In Existing work, they propose a unified design of reed Solomon decoder for correcting the random errors and burst error with fewer complications. In this paper, we propose Cellular Automata based byte error correction by using an adaptive algorithm which can correct the random error as well as burst and byte level of error detection and correction. With these automata, the power and error correction improves for both the encoder and decoder can be efficiently implemented with an array of CA with high throughput. This design is best suited for high speed memory systems built with byte organized RAM chips. This design methodology is so simple which can be implemented in VLSI design.
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