VLSI BASED IMAGE COMPRESSION ARCHITECTURE USING DWT

In image processing one of significant perspective is the image compression. It is concerned in reducing the quantity of fundamental element to represent of an image. An immense memory and high data transfer capacity are required for transmission of pictures continuously. Hereafter to build the organization capacities of winning organizations in a successful way and furthermore to make the interest for capacity to an economical level, image compression gives a quick solution for this arrangement. In this proposed work, an effective discrete wavelet transform (DWT) is designed for compression of image by utilizing fundamental cell strategy and a streamlined controller pathway laterally with a capable design architecture is suggested. The architecture design is thought by reasonably interconnecting the units and is realized in Verilog HDL. The task complier is been utilized to synthesize and confirm the design functional practically by utilizing the EDA tool. The result of the approach shows decline in power use, repetition in memory utilization, high-throughput and less latency contrasted with other existing techniques.