DESIGN AND ANALYSIS OF TWO PHASE DRIVE ADIABATIC DYNAMIC ADDER FOR LOW POWER ASICS

The present scope of work deals with a novel low power logic. We have demonstrated a new adiabatic switching logic. This new logic has good power and speed performance. This is known as 2-phase drive adiabatic logic. It is dynamic energy recovery logic and can have only evaluation and hold phases. The simulations have been done in Cadence design tools. The power dissipation and propagation delays have been estimated and compared with conventional adiabatic dynamic logic. Moreover, energy saving factor and power-delay product have also been estimated. Behavior of 2PADCL has been examined with the help of 2PADCL based adder. The comparison results with the variation of frequency, voltage and temperature have been presented