ALU DESIGN USING LOW POWER GDI STANDARD CELLS

As the technology shrinking down to a nanometer, the requirement of low power design is increasing. The most widely used logic in the digital system design is CMOS logic. The other logic such as Transmission Gate (TG), Pass Transistor Logic (PTL) is used. One of the low power, high speed technique is Gate Diffusion Input (GDI). This logic consists of only 2 transistors and three inputs. The GDI technique reduces the design complexity, increases the speed of operation and reduces power dissipation. Using the GDI technique complex digital circuits can be designed with less number of transistors and also with less complexity as compared to CMOS logic. Creating a power efficient standard cell library using GDI cells helps the ASIC designer to develop any digital circuits. The characterization of both GDI and CMOS cells are performed by Liberate Tool. In this paper RTL Verilog module for 4 bit and 8-bit ALU is written and synthesized using GDI standard cells and compared with CMOS standard cells. Cadence Virtuoso using 180nm Technology is used for schematic design and RTL Compiler for synthesis.