POWER EFFICIENT SERDES TRANSCEIVERS FOR HIGH-SPEED SERIAL COMMUNICATION– REVIEW

A SerDes is a transceiver with an integrated circuit (IC or chip) that converts parallel data into serial data and vice versa. SerDes has generally been used in the high-speed serial interface for the past few years and is widely used as an ASIC type and explicitly standard part of the application. Use both frequency adjustment and jitter as components. However, the actual incentive for a particular ser/des must be estimated experimentally. Intermediate frequency behavior Interactions in the IF range are generally complex. With technology slowdowns and processing speeds increasing, electrical connections are seen as a bottleneck for high-speed signal transmission between chips. The wide range of SerDes drive covers large distances at multi-gigabit speeds with a simple FPGA interface. A ser/des is a pair of functional squares commonly used in high-speed communications. The paper surveys with the SERDES technology for networking capacity regions. A data switch concept is presented to illustrate the intended useful backplane and switch SERDES ICs.