Hybrid Cryptographic Processor for Secure Communication Using FPGA

Cryptographic hash functions are mainly used for the purpose of authentication and for integrity of messages. In this paper, we investigate high-speed, efficient hardware algorithm which is a combination of both RSA and BLAKE for providing privacy and security in data networks including encryption/decryption. Hash function- BLAKE is a new standard candidate algorithm; it is one of the finalists in the SHA-3 competition by NIST. RSA is the asymmetric public key cryptography system. Since this is a hybrid algorithm it provides the advantages of both the asymmetric and symmetric key. The choice of the algorithm is based on the absence of backdoor in both these algorithms. The coding of the RSA and BLAKE is done in VHDL and the FPGA synthesis is done using Modelsim software. The results shows that the proposed algorithm is more secure than the simple RSA hardware implemented using the traditional multiplication algorithm.