Reviews on Algorithms and Architectures for Efficient Design of MIMO Accelerator

We surveyed about the design techniques of Multiple Input Multiple Output (MIMO) accelerator.The MIMO accelerator is a software programmable device that specializes in MIMO decoding and MIMO signal processing for Orthogonal Frequency Division Multiplexing systems(OFDM).It allows various algorithms to be easily implemented with a single hardware design. The accelerator is fully programmable within the domain of algorithms and functions needed to implement MIMO decoding for any arbitrary system or standards (i.e.,WiFi, LTE, etc.).To improve the system performance and reduce the complexity of the accelerator design some algorithms and architectures has been discussed here. The implementation of Field Programmable Gate Array(FPGA) architectures has been reviewed to minimize the overall energy/area consumption for the efficient design of accelerator hardware.