Design of One Stage Operational Transconductance Amplifiers at 65nm and 90 nm for Low Power Applications

A novel design technique for one stage CMOS Operational Transconductance Amplifier (OTA) for nanometer application. The idea is to achieve improved gain-bandwidth product (GBW), DC gain, settling time, and slew rate. This is well known that, these parameters are important for high frequency, fast settling applications, such as switched capacitor filters, analog to digital converters, oscillator. They have vast application areas through analog design field, implemented in 32nm process parameters. We have designed OTAs for 65nm and 90 nm technologies. DC gain, Average Power, Bandwidth, Output resistance, Phase Margins and Unity Gain Frequency have been simulated for both 65nm and 90 nm OTAs. At 65nm technology node DC gain (24.6 dB), Average Power (24.17uW), Bandwidth (1.16 MHz), Output resistance (7.7K-Ohms), Phase Margin (86.760) and Unity Gain Frequency (18.6MHz). At 90nm technology node, DC gain (29.3 dB), Average Power (14.54uW), Bandwidth (0.43 MHz), Output resistance (12 K-Ohms), Phase Margin (88.200) and Unity Gain Frequency (11.32MHz) are simulated using Hspice.