Design of Second Order Discrete Time Sigma Delta Modulator for High Resolution Applications

Aim of This work is to Design a second order discrete time sigma delta modulator for low frequency high resolution applications, which can be used in data converters (sigma delta ADC) where high resolution is required for more accuracy in signal processings. A real world is analogue but easier to process digital data ex speech, image processings. Analog signal contains too much unnecessary data ADC samples the data and splits into finite information. Sigma delta ADC is very much suitable for less area low frequency and high resolution data conversions. Now the aim is to design a sigma delta modulator in which these parameters plays major role 1) resolution 2) order 3) OSR 3) power consumption 4) SNR 5) SNDR 6) dynamic Range. This design is carried out with the 180nM CMOS technology at an operating voltage of 700mV, and the results are tested with the help of Cadence Virtuoso Spectre Circuit Simulator.