Implementation of Space Time Block Codes for Wimax Applications
Journal: International Journal of Science and Research (IJSR) (Vol.2, No. 3)Publication Date: 2013-03-05
Authors : M Ravi; A Madhusudhan;
Page : 52-56
Keywords : real-time implementation; Alamouti; FPGA; maximum likelihood decoder; MIMO;
Abstract
This paper describes the concept, architecture, development and demonstration of a real time, maximum likelihood Alamouti decoder for a wireless 4-transmit 4-receiver multiple input and multiple output (MIMO) Smart Antenna Software Radio Test System (SASRATS) platform. It is implemented on a Xilinx Vertex 2 Pro Field Programmable Gate Array (FPGA). Hardware, firmware, use of the Xilinx Core Generator Intellectual Property modules and experimental verification of the decoder are discussed.
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