A Fibonacci Coding Technique to Avoid Crosstalk on On-Chip Data Bus

As VLSI technology has scale down to the deep sub-micrometer (DSM) technology the global interconnect delay is becoming a large fraction of the overall delay of a circuit. Additionally, the increasing cross-coupling capacitances between wires on the same metal layer create a situation where the delay of a wire is strongly dependent on the electrical state of its neighboring wires. So the crosstalk delay on a data bus is highly dependent on the data patterns transmitted on the data bus. Different crosstalk avoidance coding schemes have been proposed to increase the bus speed by decreasing the interconnect delay. By exploiting Fibonacci number a family of Fibonacci coding Techniques is proposed for crosstalk avoidance. The properties of the Fibonacci coding techniques which are used for crosstalk avoidance are analyzed and show that mathematically, a mapping scheme exists based on the presentation of numbers in the Fibonacci numeral system. . Compared to the existing techniques these coding techniques require only 23 wires for 16 bit data. The proposed techniques evaluate the performance details of the Fibonacci coding techniques which avoids the crosstalk Class 4 and Class 3 completely. Hence crosstalk delay reduces which intern improves the overall performance of the system.