Design of Low Power Voltage Controlled Ring Oscillator Using MTCMOS Technique

In this paper, a parallel analysis of input and phase noise of ring oscillators subjected to MTCMOS technique by using different delay cells is presented. Based on this analysis oscillators that are tolerant to supply/ground noise can be identified and used for low noise oscillator design. MTCMOS techniques have been simulated and presented here which shows very drastic reduction in leakage power and noise. By using MTCMOS tech phase noise is 70 % reduced by using the Forward body bias tech and 78 % reduced by diode based technique and 85-88 % reduced by using SS-ULP diode based MTCMOS technique as compared to the base case when phase noise is measured for different delay cells at 45nm scale. A significant amount of leakage power has been reduced by using power gating scheme. Leakage power is reduced 72 % by using the Forward body bias technology and 78 % reduced by diode based trimode technique and approx 85 % reduced by using SS-ULP diode based MTCMOS technique as compared to the base case measured for different delay cells at 45nm scale.