New Design for Obtain Fault Tolerant Logic Gate Using Quantum-Dot Cellular Automata

In recent year Quantum-dot Cellular Automata (QCA) technology is very popular for design low power digital circuits. It is one of the best nanotechnology to used in low power application and high speed devices such as super computer. In this paper, we propose design of completely testable sequential circuits based on conservative logic gates using fault tolerance model. The proposed fault tolerance model consist two test vector 0s and 1s. Any sequential circuit can be tested for classical unidirectional stuck-at faults 0s and stuck at fault 1s using only two test vectors. It also provides the design sequential circuits which are completely tested and reversible in nature. We are also presenting a non reversible conservative logic gate called multiplexer conservative QCA gate (MX-cqca) which provide the output similar to 2: 1 mux. we have proposed design of D-latch, master slave flip-flop, DET flip-flop and MX-cqca gate which are better than the existing fredking gate design in terms of no of gate, delay time and power consumption