VLSI based Fuzzy Logic Static Voltage Regulation System

Fixed Voltage Regulator is an electronic device that regulates changeable voltages in a specific approach and protects the apparatus through practically eliminating any transients in the sharing set of connections. It is a good number appropriate for24-hour permanent progression operations where collapse due to fluctuations consequences in serious economic losses and smashup of equipments. But in todays circumstances low power consumption and low cost are the main features of any voltage system design. So to meet the over necessities, in my project we have planned a VLSI based fuzzy logic static voltage regulation system using low cost CPLD with low consumption. This type of voltage regulators have many industrialized uses where 24 hour electricity is essential and where power cut or voltage fluctuation may reason critical losses. The incorporation of complete logic into a single chip CPLD reduces the cost of the system. It also reduces the design area and definitely it will additional reduce the power consumption. The mainframe and other peripherals will be replaced by a single chip CPLD. VHDL programming will be used for making CPLD device because it can port to any device so as to facilitate mass production. The board is by default programmed with a *. jam file, which contains CPLD board diagnostic system. This can be used to test all the peripherals that are on the board with CPLD.