Sobel Edge Detection Implementation using FPGA

Edge detection is an important tool in digital image processing applications for extracting information from image. Sobel operator based edge detection algorithm creates an image which highlights edges and transitions. In real-time image processing applications, it is required to process large data of pixels in a given timing constraints. Hence, speed of image processing is a big problem. Reconfigurable device like FPGAs deploy parallelism techniques in image processing algorithms thereby reducing execution times and increasing speed of operation. This paper presents implementation of sobel edge detection algorithm on FPGA. Xilinx ISE Design Suite-14.2 software platform is used to design an algorithm using Verilog language.