Analysis of Different Power Efficient Flip-Flops
Journal: International Journal of Science and Research (IJSR) (Vol.5, No. 4)Publication Date: 2016-04-05
Authors : Savita Pandey; Padmini Sahu;
Page : 91-94
Keywords : Dual Edge Triggering; Conditional Capture Technique; Conditional Precharge; Power Delay Product; Clock Distribution Network;
Abstract
A power efficient flip flop dissipates very less power as compared to normal flip flops. In this paper different power efficient flip-flop switch different specific features are compared. A specified category of power efficient flip-flops known as the Dual Edge Triggered flip-flops are also considered in this comparison. The Dual Edge Triggered flip-flops responses to both positive and negative edge of clock. Hence this flip-flop can significantly reduce the clock related power. In this article, we compare several published implementations of power efficient flip-flops for performance & power consumption.
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