Simulation of Silicon Nanowire Field Effect Transistor for Different High k Dielectric Material

Scaling of the MOSFET leads to the better performance of the device up to certain extent but further scaling when channel length approaches from m to nm regime leads to short channel effects such as subthreshold voltage, drain induced barrier lowering etc. This paper discuss about the simulation of Silicon Nanowire Field Effect with different high ?k dielectric material such as SiO2, ZrO2 and HfO2 at different temperature for different gate control parameter. By keeping diameter and gate insulation thickness constant we conclude that as we go for high ? k dielectric material there is better response for On current, leakage current and quantum capacitance limit..