FPGA Based Implementation of Compact Genetic Algorithm

This paper presents implementation of compact genetic algorithm (CGA) on FPGA. The CGA is a Probability vector based genetic algorithm, which require less memory, less processing power and very simple hardware implementation compare to traditional genetic algorithm. The software implementation is always restricted in term of high real time application by computer system. This paper introduces a hardware structure of CGA. The design is realized using Verilog HDL, then simulated by Xilinx ISE 10.1 and fabricated on FPGA Vertex 4.