RECONFIGURABLE SINGLE PRECISION FLOATING POINT MULTIPLIER USING REVERSIBLE LOGIC

Now a days Reversible logic has received great attention due to their ability to reduce the power dissipation. It is the main requirement in low power Very large scale integration (VLSI) design. Using reversible logic circuits Quantum computers are constructed which has applications in various research areas such as DNA computing, low power CMOS design, optical computing, nanotechnology bio-informatics, quantum computing, and thermodynamic technology. It is very difficult to construct quantum circuits without the use of reversible logic gates. Since fan-out and feedback is not allowed in reversible logic circuits, Synthesis of reversible logic circuits is significantly more complicated than traditional irreversible logic circuits. There are several reversible logic gates. Some of them are: Taffoli gate, Fredkin gate, Feynmen gate, Peres gate, etc. These logical gates as well as some derivatives of these gates are explored in this project and will be used conveniently to design the single precision floating point multiplier to improve its area, speed and power parameters.