SDRAM CONTROLLER DESIGN FOR DATA ACQUISITION ON XILINX SPARTAN 3E FPGA

In the modern electronics equipments that uses the memory, efficient and High speed memory controllers are must. Memory controllers will control the data flow in all electronic equipments such as Mobile Phones, Computers, Audio Video devices etc. Large number of signals can be sent or received at a time to the memory device. But sending or receiving the data directly will cause more traffic which degrades t he performance of the device. In order to overcome such issues the memory controller is designed. User cannot directly interface with the memory device. In this project we are designing a memory controller the acts as an interface to control the signals ef ficiently between the SDRAM and user. A SDRAM memory device is used in order to decrease the latency and power consumption. The user interface can be done using the USB device. Design of this memory controller was done by considering many constraints. Desi gned memory controller uses the Xilinx platform which configured with DDR2 as the FPGA component.