IMPLEMENTATION OF AE S ALGORITHM ON MICRO BLAZE SOFT PROCESSOR

The importance of cryptography applied to security in electronic data transactions has acquired an essential relevance during the last few years. In this work, an FPGA - based implementation of the Advanced Encryption Standard (AES) algorithm is proposed. The proposed design is developed on a soft - m icrocontroller (Microblaze) using hardware descriptive language (especially Verilog), Xilinx EDK environment. All the results are synthesized and simulated using Xilinx EDK, Xilinx ISE and ISim software respectively. An iterative looping methodology of blo ck and key size of 128 bits is approached and also, S - box lookup table implementation is carried out which gives low latency, low complexity architecture and high throughput. The simulation results show the performance of the design.