A COMPARATIVE STUDY OF CLOCK GATED ETCAM WITH ZTCAM

Ternary Content Addressable memory is a kind of memory which allows the required memory to be searched by content, instead of searching by address. It implements high speed lookup operations within a single clock cycle. But when compared to RAM technology the conventional TCAM circuitry has certain precincts such as longer access time, low storage capacity, circuit density and high cost. This brief proposes a novel memory architecture, named clock gated Z-TCAM, which emulates the TCAM functionality with SRAM. Conventional Z-TCAM architecture divides the classical TCAM table columns and rows into hybrid TCAM sub tables, which will be processed to map on their respective memory blocks. Proposed architecture offers better search performance ,scalability and a better power delay product than the conventional ZTCAM. So these SRAM based TCAM structure can be used in networking applications such as packet switching and packet classification in communication systems.