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Journal: International Journal of Engineering Sciences & Research Technology (IJESRT) (Vol.4, No. 10)

Publication Date:

Authors : ; ;

Page : 702-707

Keywords : Adiabatic; ECRL; PFAL; Secure logic;

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Adiabatic logic, which works on the principle of Energy Recovery, is proving to be an emerging low power approach in low power design. A limiting factor for the exponentially increasing integration of microelectronics is represented by the power dissipation. Though CMOS technology provides circuits with very low static power dissipation, during the switching operation currents are generated, due to the discharge of load capacitances that cause a power dissipation increasing with the clock frequency. The adiabatic technique prevents such losses: the charge does not flow from the supply voltage to the load capacitance and then to ground, but it flows back to a trapezoidal or sinusoidal supply voltage and can be reused. Just losses due to the resistance of the switches needed for the logic operation still occur. In order to keep these losses small, the clock frequency has to be much lower than the technological limit.

Last modified: 2015-10-28 12:11:56