Introduction To Novel Approaches To Low Leakage And Area Efficient

Abstract The development of digital integrated circuits is challenged by higher power consumption. The combination of higher clock speeds greater functional integration and smaller process geometries has contributed to significant growth in power density. Scaling improves transistor density and functionality on a chip. Scaling helps to increase speed and frequency of operation and hence higher performance. As voltages scale downward with the geometries threshold voltages must also decrease to gain the performance advantages of the new technology but leakage current increases exponentially. Thinner gate oxides have led to an increase in gate leakage current.