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Journal: International Journal of Engineering Sciences & Research Technology (IJESRT) (Vol.4, No. 11)

Publication Date:

Authors : ;

Page : 517-525

Keywords : Electrocardiogram (ECG); FPGA; PWM; Signal Generator; Verilog HDL.;

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This paper offers a hardware design to produce a programmable ECG-channels signal generator using only a Field Programmable Gate Array (FPGA) and a small number of passive external components. The FPGA is used to create a new technique using linearised pulse width modulation (PWM) scheme, which would not be possible with other alternatives technologies such as a microcontroller. This system can be used in the testing of multi-inputs ECG system without needing to use a human or extra testing cost. This approach is developed to improve accuracy of the signal waveform without increasing the hardware or complexity, the overall system takes up only 30% of the available FPGA slices. The system described has applicability in other areas where multiple, time skewed and low voltage signals are required. The waveform signal for each channel can be modified easily to match the need of the application. The application of ECG generator has many advantages such as reducing the test time and simplifies the use of ECG signals without need for invasive and non-invasive methods.

Last modified: 2015-11-29 17:00:33