DESIGN AND IMPLEMENTATION OF BIST TECHNIQUE IN UART SERIAL COMMUNICATION

This paper describes a design and implementation of BIST technique in UART serial communication. Asynchronous serial communication is usually implemented by uart which is mostly used for less distance, low speed, low cost data to exchange between processor and peripherals. But due to the errors produced in the output of the data received the circuits are being not performed well in the functions In order to reduce the possibility of product failures and missed market opportunities by providing the need to e nsure the data to be transferred in error proof. So with the proposed architecture of bist in uart we can reduce expensive tester requirements and testing procedures in circuit are minimized and it eliminates the need to acquire high - end testers. The imple mentation of BIST technique in uart serial communication is simulated and synthesized using Xilinx and model - sim 12.3 versions