A Built In Self-Test and Repair Analyser for Embedded Memories
Journal: International Journal for Scientific Research and Development | IJSRD (Vol.3, No. 10)Publication Date: 2016-01-01
Authors : Jyothi M;
Page : 610-611
Keywords : BISR; SOC technology; memory;
Abstract
This paper presents a survey of different algorithms to test and repair a memory. This paper explains about different built in self-test and built in self repair analysis of embedded memories. The improvement in the yield of memories plays an important role in SOC. The use of spare rows and spare columns with redundancy allocation is proven to be more promising since it gives an optimal repair rate in a single test.
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Last modified: 2016-01-08 17:44:15